Events at Physics
I will discuss methods for estimating the communication cost on two distinct hardware layouts for ion trap quantum computation in the context of concatenated error correcting codes. In the first hardware layout, the ions are held in multiple zones and communications is performed by physically shuttling ions between zones . The second hardware layout uses photons to create entangled ions in distant traps by the process of heralded entanglement . These entangled ions are then used as teleportation channels to transfer information. I will compare possible architectures for arranging these systems on the logical level. Finally, I will briefly describe how these same architectural ideas can be applied in the setting of topological error correction.
 M.G. Whitney, N. Isailovic, Y. Patel and J. Kubiatowicz, A fault tolerant, area efficient architecture for Shor's factoring algorithm, Proc. of the 39th Annual Intl. Symp. on Computer Architecture ( ISCA), 383 (2009).
C. R. Clark, T. S. Metodi, S. D. Gasster, and K. R. Brown, Resource requirements for fault-tolerant quantum simulation: the transverse Ising model ground state, Phys. Rev. A 79, 062314 (2009).
 D. Kielpinski, C. Monroe & D. J. Wineland, Architecture for a large-scale ion-trap quantum computer, Nature 417, 709 (2002).
 L.-M. Duan and C. Monroe, Quantum networks with trapped ions ,Rev. Mod. Phys. 82, 1209 (2010).